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| 1 |
[Jan. 9, 2024]
S.-O. Jung, S.Kim, T. Oh, S. Lim, D. Ko "US 17/588,180, Nonvolatile Memory Device and Latch Including the Same”, Jan. 9, 2024. |
| 2 |
[Jan. 9, 2024]
S.-O. Jung, S. Lim, T. Oh, S. Kim, D. Ko "US 17/671,516, Physically Unclonable Function Apparatus based on Ferroelectric Elements and Operation Method Thereof”, Jan. 9, 2024. |
| 3 |
[Jun. 9, 2023]
S.-O. Jung, J. Park, J. Park "2018109019459(China), Apparatus for Measuring Distance Using Two-Step Tracking Based on SPAD Sensor and Method thereof”, Jun. 9, 2023.
[Aug. 18, 2020]
S.-O. Jung, J. H. Park, J.-H. Park, "US10,746,543, Apparatus for measuring distance using two-step tracking based on SPAD sensor and method thereof”, Aug. 18, 2020. |
| 4 |
[Jun. 6, 2023]
S.-O. Jung, S. Lee, K. Cho, "US11,670,360, Integrated Circuit Including Cell Array with Word Line Assist Cells”, Jun. 6, 2023.
|
| 5 |
[Apr. 25, 2023]
S.-O. Jung, K. Cho, "US11,636,894, Integrated Circuit Including Cell Array with Write Assist Cell”, Apr. 25, 2023.
|
| 6 |
[Feb. 21, 2023]
S.-O. Jung, S. Lee, S. Joo, "US11,587,203, Method for Optimizing Hardware Structure of Convolutional Neural Networks”, Feb. 21, 2023.
|
| 7 |
[Jan. 31, 2023]
S.-O. Jung, K. Cho, "US11,568,924, Static Random Access Memory (SRAM) Device and Method of Operating the same”, Jan. 31, 2023. |
| 8 |
[Dec. 6, 2022]
S.-O. Jung, T. Kim, B. Song, "US11,521,679, Memory device for canceling sneak current”, Dec. 6, 2022. |
| 9 |
[Aug. 30, 2022]
S.-O. Jung, J. Ko, J. Kim, "ZL201710218129.3 (China), [Program] RC variation 감소를 위한 WL 제어 방법”, Aug. 30, 2022. |
| 10 |
[Aug. 2, 2022]
S.-O. Jung, S. Joo, S. M. Lee, H. K. Ahn, "US11,403,731, Image upscaing apparatus using artificial neural network having multiple decibvolution layers and deconvolution layer pluralization method thereof”, Aug. 2, 2022. |
| 11 |
[Jul. 15, 2022]
S.-O. Jung, S. Oh, H. Jung, J. Park, "ZL2018108060526 (China), Static random access memory including assist circuit”, Jul. 15, 2022.
[Dec. 31, 2019]
S.-O. Jung, S. H. Oh, H. Jeong, J. H. Park, "US10,522,216, Static random access memory including assist circuit”, Dec. 31, 2019. |
| 12 |
[Jun. 29, 2021]
S.-O. Jung, J. Ko, J. Kim, "ZL201710187763.5 (China), Read/verify operation and controlling method of memory device”, Jun. 29, 2021. |
| 13 |
[Dec. 1, 2020]
S.-O. Jung, K. R. Kim, D. H. Jung, H. K. Ahn, "US10,855,101, Apparatus for harvesting energy using dual environment energy source and method thereof”, Dec. 1, 2020. |
| 14 |
[Oct. 13, 2020]
S.-O. Jung, B. Song, S. Lim, S. H. Kang, S. Kim "US10,803,942, Transistor noise tolerant, non-volatile (NV) resistance element-based static random access memory (SRAM) physically unclonable function (PUF) circuits, and related systems and methods”, Oct. 13, 2020. |
| 15 |
[Jul. 2, 2019]
S. W. Han, J. K. Min, J. K. Lee, S.-O. Jung, K. S. Min, I. H. Cho, "US10,339,830, Device for providing description information regarding workout record and method thereof”, Jul. 2, 2019. |
| 16 |
[Jun. 11, 2019]
S.-O. Jung, J. Park, H. Jeong, T. W. Oh, "US10,319,434, Static random access memory cell capable of performing differential operation”, Jun. 11, 2019. |
| 17 |
[Jun. 11, 2019]
S.-O. Jung, B. Song, S. Kim, J. P. Kim, S. H. Kang, "US10,319,425, Offset-cancellation sensing circuit (OCSC)-based non-volatile (NV) memory circuits”, Jun. 11, 2019. |
| 18 |
[Jun. 4, 2019]
H. Jeong, W. J. Rim, T. J. Song, S.-O. Jung, G. H. Kim, "US10,311,946, Semiconductor memory device with assymetric precharge”, Jun. 4, 2019. |
| 19 |
[May. 14, 2019]
S. S. Song, S.-O. Jung, H. Jeong, G. Nallapati, C. Chidambaram, "US10,291,211, Adaptive Pulse Generation Circuits for Clocking Pulse Latches with Minimum Hold Time”, May. 14, 2019. |
| 20 |
[May. 14, 2019]
S.-O. Jung, S. Choi, H. K. Ahn, S. H. Kang, S. Kim, "US10,290,340, Offset-canceling (OC) write operation sensing circuits for sensing switching in a magneto-resistive random access memory (MRAM) bit cell in an MRAM for a write operation”, May. 14, 2019. |
| 21 |
[Apr. 16, 2019]
S.-O. Jung, S. Choi, B. Song, T. Na, J. Kim, J. P. Kim, S. Kim, T. Kim, S. H. Kang, "US10,263,645, Error correction and decoding”, Apr. 16, 2019. |
| 22 |
[Apr. 2, 2019]
S.-O. Jung, J.-H. Park, K. Kim, "US10,249,781, Apparatus for counting single photons and method thereof”, Apr. 2, 2019. |
| 23 |
[Mar. 5, 2019]
S.-O. Jung, S. Choi, H. K. Ahn, S. H. Kang, S. Kim, "10,224,087, Sensing voltage based on a supply voltage applied to magnetoresistive random access memory (MRAM) bit cells in an MRAM for tracking write operations to the MRAM bit cells”, Mar. 5, 2019. |
| 24 |
[July. 31, 2018]
S.-O. Jung, Y. Yang, S. S. Song, Z. Wang, and C. F. Yeap, “US10,037,795: Seven-transistor static random-access memory bitcell with reduced read disturbance”, July. 31, 2018. |
| 25 |
[July. 10, 2018]
S.-O. Jung, T. W. Oh, and H. Jung, “US10,020,050: Local bit line-sharing memory device and method of driving the same”, July. 10, 2018. |
| 26 |
[June. 26, 2018]
Y.-H. Lee, J.-S. Kim, C.-Y. Yu, J.-Y. Chun, S.-H. Baek, J.-Y. Ko, S.-O. Jung, and J.-S. Kim, “US10,008,270: Non-volatile memory device and programming method thereof”, June. 26, 2018. |
| 27 |
[June. 5, 2018]
Y. An, J.-H. Park, K. Kim, S.-O. Jung, and J. Yim, “US9,989,582: Device for measuring threshold voltage of a transistor based on constant drain voltage and constant drain source current”, June. 5, 2018. |
| 28 |
[May. 22, 2018]
Y.-H. Lee, J.-S. Kim, C.-Y. Yu, J.-Y. Chun, S.-H. Baek, J.-Y. Ko, S.-O. Jung, and J.-S. Kim, “US9,978,458: Memory device, memory system, and read/verify operation method of the memory device”, May. 22, 2018. |
| 29 |
[Jan. 23, 2018]
S.-O. Jung, H. Park, S.-C. Song, M. H. Abu-Rahma, L. Ge, Z. Wang, B.-M. Han, “US9,875,788: Low-power 5T SRAM with improved stability and reduced bitcell size”, Jan. 23, 2018. |
| 30 |
[Jan. 16, 2018]
S.-O. Jung, D.-H. Jung, H. Choi, "US9,871,447: DC-DC converter”, Jan. 16, 2018. |
| 31 |
[Jan. 9, 2018]
S.-O. Jung, M. Kang, H. Park, S.-C. Song, M. Abu-Rahma, B.-M. Han, L. Ge, Z. Wang, “US9,865,330: Stable SRAM bitcell design utilizing independent gate FinFET”, Jan. 9, 2018. |
| 32 |
[Dec. 26, 2017]
T. Na, B. K. Song, S.-O. Jung, J. P. Kim, S. H. Kang, "US9,852,783: Metal-oxide semiconductor (MOS) transistor offset-cancelling (OC), zero-sensing (ZS) dead zone, current-latched sense amplifiers (SAs) (CLSAs) (OCZS-SAs) for sensing differential voltages," Dec. 26, 2017. |
| 33 |
[Oct. 24, 2017]
S.-O. Jung, S. Choi, B. K. Song, T. Na, J. Kim, J. P. Kim, S. Kim, T. Kim, S. H. Kang, "US9,800,271: Error correction and decoding," Oct. 24, 2017. |
| 34 |
[Aug. 8, 2017]
S.-O. Jung, B. K. Song, T. Na, J. P. Kim, S. H. Kang, "US9,728,259: Non-volatile (NV)-content addressable memory (CAM) (NV-CAM) cells employing differential magnetic tunnel junction (MTJ) sensing for increased sense margin," Aug. 8, 2017. |
| 35 |
[Jun. 27, 2017]
S.-O. Jung, T. Na, B. Song, J. P. Kim, S. H. Kang, "US9,691,462: Latch offset cancelation for magnetoresistive random access memory,” Jun. 27, 2017. |
| 36 |
[May. 30, 2017]
S.-O. Jung, T. Na, B. Song, J. P. Kim, S. H. Kang, "US9,666,259: Dual mode sensing scheme,” May. 30, 2017. |
| 37 |
[Mar. 22, 2017]
S.-O. Jung, K. Ryu, Y.-J. An, D.-H. Jung, "ZL 201410025513.8: Temperature sensor and temperature sensing method,” Mar. 22, 2017.
[Feb. 21, 2017]
S.-O. Jung, K. Ryu, Y.-J. An, D.-H. Jung, "US9,574,948: Temperature sensor and temperature sensing method,” Feb. 21, 2017. |
| 38 |
[Feb. 28, 2017]
S.-O. Jung, Y. Yang, B. Yang, C. F. Yeap, ”US9,583,178: SRAM read preferred bit cell with write assist circuit,” Feb. 28, 2017.
|
| 39 |
[Feb. 21, 2017]
S.-O. Jung, H. Jeong, Y. Yang, K. Kang, "US9,576,623: Sense amplifier and semiconductor memory device employing the same,” Feb. 21, 2017. |
| 40 |
[Jan. 24, 2017]
S.-O. Jung, K. Kang, H. Jeong, Y. Yang, J. Park, "US9,552,872: Memory device,” Jan. 24, 2017. |
| 41 |
[Nov. 22, 2016]
S.-O. Jung, S. Choi, J. Kim, T. Na, J. P. Kim, S. H. Kang, "US9,502,088: Constant sensing current for reading resistive memory,” Nov. 22, 2016. |
| 42 |
[Nov. 22, 2016]
S.-O. Jung, T. Na, B. Song, J. P. Kim, S. H. Kang, "US9,502,091: Sensing circuit for resistive memory cells,” Nov. 22, 2016. |
| 43 |
[Nov. 15, 2016]
W. Rim, T. Song, G. Kim, S. O. Jung, H. Jeong, "US9,496,027: Static random access memory device including write assist circuit and writing method thereof,” Nov. 15, 2016. |
| 44 |
[Oct. 4, 2016]
S.-O. Jung, Y. Yang, S. S. Song, Z. Wang, C. Yeap, "US9,460,777: SRAM read buffer with reduced sensing delay and improved sensing margin,” Oct. 4, 2016. |
| 45 |
[Aug. 9, 2016]
J.-H. Kim, D.-H. Jung, K.-H. Ryu, S.-O. Jung, B.-C. Oh, "US9,413,236: Voltage converter,” Aug. 9, 2016. |
| 46 |
[Aug. 2, 2016]
S.-O. Jung, T. Na, J. Kim, J. P. Kim, S. H. Kang, "US9,406,354: System, apparatus, and method for an offset cancelling single ended sensing circuit,” Aug. 2, 2016. |
| 47 |
[Jul. 12, 2016]
S.-O. Jung, T. Na, J. Kim, J. P. Kim, S. H. Kang, "US9,390,779: System and method of sensing a memory cell,” Jul. 12, 2016. |
| 48 |
[Jun. 28, 2016]
S.-O. Jung, T. Na, J. Kim, J. P. Kim, S. H. Kang, "US9,378,781: System, apparatus, and method for sense amplifiers,” Jun. 28, 2016. |
| 49 |
[May. 10, 2016]
Y. Yang, S. S. Song, C. F. Yeap, Z. Wang, S.-O. Jung, ”US9,336,863: Dual write wordline memory cell," May. 10, 2016. |
| 50 |
[Mar. 8, 2016]
T. Na, J. Kim, J. P. Kim, S. H. Kang, S.-O. Jung, ”US9,281,039: System and method to provide a reference cell using magnetic tunnel junction cells," Mar. 8, 2016. |
| 51 |
[Nov. 24, 2015]
S.-O. Jung, Y. Jung, K. Ryu, J. Kim, J. P. Kim, S. H. Kang, ”US9,196,337: Low sensing current non-volatile flip-flop,” Nov. 24, 2015. |
| 52 |
[Oct. 20, 2015]
S.-O. Jung, T. Na, J. Kim, J. P. Kim, S. H. Kang, ”US9,165,630: Offset canceling dual stage sensing circuit,” Oct. 20, 2015. |
| 53 |
[Oct. 6, 2015]
D.-H. Jung, J.-H. Kim, K.-H. Ryu, S.-O. Jung, B.-C. Oh, ”US9,154,140: Delay locked loop,” Oct. 6, 2015. |
| 54 |
[Aug. 18, 2015]
S.-O. Jung, Y. Yang, B. Yang, Z. Wang, C. F. Yeap, ”US9,111,635: Static random access memories (SRAM) with read-preferred cell structures, write drivers, related systems, and methods,” Aug. 18, 2015. |
| 55 |
[Aug. 18, 2015]
S.-O. Jung, T. Na, J. Kim, J. P. Kim, S. H. Kang, "US9,111,623: NMOS-offset canceling current-latched sense amplifier," Aug. 18, 2015. |
| 56 |
[Aug. 11, 2015]
S. Jung, J.-H. Park, K, H. Ryu, D. H. Jung, ”US9,104,181: Time-to-digital converter,” Aug. 11, 2015, |
| 57 |
[May. 19, 2015]
S.-O. Jung, D.-H. Jung, K. Ryu, J.-H. Park, ”US9,035,684: Delay locked loop and method of generating clock,” May. 19, 2015. |
| 58 |
[Oct. 21, 2014]
K.-S. Kim, S.-O. Jung, S.-H. Woo, K.-H. Ryu, D.-H. Jung , ”US8,864,376: Temperature sensing circuit,” Oct. 21, 2014. |
| 59 |
[May. 6, 2014]
S.-O. Jung, K. Ryu, J. Kim, J. P. Kim, S. H. Kang, ”US8,717,811: Latching circuit,” May. 6, 2014. |
| 60 |
[Apr. 11, 2014]
S.-O. Jung, J. Jung, K. Ryu, ”US8,686,772: Frequency multiplier and method of multiplying frequency,” Apr. 11, 2014. |
| 61 |
[Apr. 8, 2014]
S.-O. Jung, J. Kim, K. Ryu, S. H.Kang, ”US8,693,272: Sensing circuit,” Apr. 8, 2014. |
| 62 |
[Mar. 11, 2014]
S.-O. Jung, Y. Jung, K. Ryu, J. Kim, J. P. Kim, S. H. Kang, ”US8,670,266: Non-volatile flip-flop,” Mar. 11, 2014. |
| 63 |
[Dec. 17, 2013]
S.-O. Jung, J. Kim, Y. Jung, J. P. Kim, S. H. Kang , ”US8,611,132: Self-body biasing sensing circuit for resistance-based memories,” Dec. 17, 2013. |
| 64 |
[Oct, 1, 2013]
S. Jung, J.-H. Park, K. Ryu, D.-H. Jung, "US8,547,153: Delay locked loop," Oct. 1, 2013. |
| 65 |
[Sep. 10, 2013]
S.-O. Jung, J. Kim, K. Ryu, J. P. Kim, S. H. Kang, "US8,531,902; Sensing circuit," Sep. 10, 2013. |
| 66 |
[Aug. 27, 2013]
W. Lee, D. Lee, S.-O. Jung, H. Kang, K. Ryu, D. Jung,"US8,519,758: Digital DLL including skewed gate type duty correction circuit and duty correction method thereof," Aug. 27, 2013. |
| 67 |
[Jul. 23, 2013]
J.-R. Choi, S.-O. Jung, S. Kim, H. Kang, K. Ryu, "US8,493,116: Clock delay circuit and delay locked loop including the same," Jul. 23, 2013. |
| 68 |
[May 21, 2013]
S.-O. Jung, S.-C. Song, H. Park, "US8,447,547 : Static noise margin estimation," May. 21, 2013. |
| 69 |
[Apr. 30, 2013]
K. Ryu, J. Kim, S.-O. Jung, S. H. Kang,“US8,432,727: Invalid write prevention for STT-MRAM array," Apr. 30, 2013. |
| 70 |
[Apr. 16, 2013]
S.-O. Jung, J. Kim, J.-H. Song, S. H. Kang,“US8,423,329: System and method of adjusting a resistance-based memory circuit parameter," Apr. 28, 2013. |
| 71 |
[Mar. 26, 2013]
S.-O. Jung, K. Ryu, J. Kim, J. P. Kim, S. H. Kang,“US8,406,064: Latching circuit," Mar. 26, 2013. |
| 72 |
[Dec. 18, 2012]
S.-O. Jung, J. Kim, S. H. Kang,“US8,335,101: Resistance-based memory with reduced voltage input/output device," Dec. 18, 2012. |
| 73 |
[Apr. 17, 2012]
S.-O. Jung, J. Kim, J.-H. Song, S. H. Kang, S.S. Yoon,“US8,161,430: System and method of resistance based memory circuit parameter adjustment,"Apr. 17, 2012. |
| 74 |
[Apr. 10, 2012]
S.-O. Jung, J. Kim, S. H. Kang,“US8,154,903: Split path sensing circuit,"Apr. 10, 2012. |
| 75 |
[Mar. 27, 2012]
S.-O. Jung, M. H. Sani, S. H. Kang, S. S. Yoon,“US8,144,509: Write operation for spin transfer torque magnetoresistive random access memory with reduced bit cell size,” Mar. 27, 2012. |
| 76 |
[Nov, 1, 2011]
H. C. Kang, K. H. Ryu, S. O. Jung, D. H. Lee, A. Joo, J.-R. Choi, "US8,049,543: Delay locked loop, electronic device including the same, and method of operating the same" Nov. 1, 2011. |
| 77 |
[Jul. 12, 2011]
S.-O. Jung, S. S. Yoon, H. Nho, “US7,979,832: Process variation tolerant memory design,” Jul. 12, 2011.
|
| 78 |
[Feb. 15, 2011]
S.-O. Jung, J. Kim, J.-H. Song, S. H. Kang, S. S. Yoon, M. H. Sani, “US7,889,585: Balancing a signal margin of a resistance based memory circuit,” Feb. 15, 2011.
|
| 79 |
[Jan. 18, 2011]
N. Chen, S.-Y. S. Lee, S.-O. Jung, Z. Wang, “US7,872,930: Testing a memory device having field effect transistors subject to threshold voltage shifts caused by bias temperature instability,” Jan. 18, 2011. |
| 80 |
[Oct. 12, 2010]
S.-O. Jung, J. Kim, J.-H. Song, S. H. Kang, S. S. Yoon, “US7,813,166: Controlled value reference signal of resistance based memory circuit,” Oct. 12, 2010. |
| 81 |
[Oct. 12, 2010]
L. G. Chua-Eoan, B. Andreev, C. C. Riddle, C. Shi, J. J. R. Gagne, S.-O. Jung, T. R. Toms, “US7,812,582: System and method of power distribution control of an integrated circuit,” Oct. 12, 2010.
|
| 82 |
[Jul. 27, 2010]
S.-O. Jung, S. H. Kang, S. S. Yoon, M. H. Sani, “US7,764,537: Spin transfer torque magnetoresistive random access memory and design methods”, Jul 27, 2010.
|
| 83 |
[Jul. 13, 2010]
S.-O. Jung, S.-S. Yoon, Y. Han, “US7,755,964: Memory device with configurable delay tracking”, Jul. 13, 2010.
|
| 84 |
[May. 18, 2010]
M.-E. Hwang, S.-O. Jung, “US7,721,236: Method and apparatus of estimating circuit delay”, May. 18, 2010.
|
| 85 |
[Aug. 18, 2009]
S.-S. Yoon, S.-O. Jung, “US7,577,785: Content addressable memory with mixed serial and parallel search,” Aug .18, 2009.
|
| 86 |
[Aug. 26, 2008]
M. Elgebaly, K. Z. Malik, L. G Chua-Eoan, S.-O. Jung, “US7,417,482: Adaptive voltage scaling for an electronics device,” Aug. 26, 2008.
|
| 87 |
[Jan. 29, 2008]
S.-S. Yoon, J.-M. Han, S.-O. Jung, “US7,324,394: Single data line sensing scheme for TCCT-based memory cells,” Jan. 29, 2008.
|
| 88 |
[Feb. 28, 2006]
S.-S. Yoon, J.-M. Han, S.-O. Jung, “US7,006,398: Single data line sensing scheme for TCCT-based memory cells,” Feb. 28, 2006.
|
| 89 |
[Oct. 25, 2005]
S.-S. Yoon, S.-O. Jung, “US6,958,931: Bit line control and sense amplification for TCCT-based memory cells,” Oct. 25, 2005.
|
| 90 |
[Jun. 7, 2005]
S.-S. Yoon, J.-M. Han, S.-O. Jung, “US6,903,987: Single data line sensing scheme for TCCT-based memory cells,” Jun. 7, 2005.
|
| 91 |
[Aug. 17, 2004]
J-.M. Han, F. Nemati, S.-O. Jung, “US6,778,435: Memory architecture for TCCT-based memory cells,” Aug. 17, 2004.
|
| 92 |
[May. 11, 2004]
S.-S. Yoon, S.-O. Jung, “US6,735,113: Circuit and method for implementing a write operation with TCCT-based memory cells,” May. 11, 2004.
|
| 93 |
[Apr. 13, 2004]
S.-S Yoon, S.-O. Jung, “US6,721,220: Bit line control and sense amplification for TCCT-based memory cells,” Apr. 13, 2004. |
| 94 |
[Feb. 13, 2001]
S.-O. Jung, “US6,188,619: Memory device with address translation for skipping failed memory blocks,” Feb. 13, 2001.
|
| 95 |
[May. 23, 2000]
S.-O. Jung, M.-H. Chang, “US6,067,255: Merged memory and logic (MML) integrated circuits Including independent memory bank signals and methods,” May. 23, 2000.
|
| 96 |
[Jun. 2, 1998]
S.-O. Jung, S.-M. Seo, D.-J. Chin, “US5,760,791: Graphic RAM having a dual port and serial data access method thereof,” Jun. 2, 1998.
|
| 97 |
[Dec. 10, 1996]
M.-C. Choi, S.-O. Jung, “US5,583,815: Mode setting circuit and method of a semiconductor memory device,” Dec. 10, 1996.
|
| 98 |
[Nov. 26, 1996]
M.-H. Son, C. Park, S.-O. Jung, “US5,579,280: Semiconductor memory device and method for gating the columns thereof,” Nov. 26, 1996.
|
| 99 |
[Nov. 5, 1996]
S.-O. Jung, “US5,572,477: Video ram method for outputting serial data,” Nov. 5, 1996.
|
| 100 |
[Dec. 12, 1995]
S.-M. Yim, J.-K. Lee, M.-T. Kim, S.-O. Jung, “US5,475,647: Flash write for a semiconductor memory device,” Dec. 12, 1995.
|
| 101 |
[Nov. 15, 1994]
S.-W. Jeong, “US5,365,489: Dual port video random access memory with block write capability,” Nov. 15, 1994.
|
| 102 |
[Aug. 13, 1993]
J.-K. Lee, S.-W. Jeong, “US5,241,502: Data output buffer circuit with precharged bootstrap circuit,” Aug. 13, 1993. |
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| 1 |
[Jun. 7, 2023]
S.-O. Jung, S. Kim, K. Baek, K. Cho "18/330,731, Dual-Edge Triggered Flip-Flop”, Jun. 7, 2023.
[May. 12, 2023]
S.-O. Jung, S. Kim, K. Baek, K. Cho "202310538568.8(China), Dual-Edge Triggered Flip-Flop”, May. 12, 2023. |
| 2 |
[May. 4, 2023]
S.-O. Jung, D. Kim, I. Jung "18/312,186, Memory Cell Based eDRAM and CIM Comprising the same”, May. 4, 2023.
|
| 3 |
[Feb. 16, 2023]
S.-O. Jung, S. Park, K. Kim, W. Cho "18/110,458, Sram Read Yield Training Method, SRAM Read Yield Prediction Method and Computing Apparatus”, Feb. 16, 2023. |
| 4 |
[Feb. 16, 2023]
S.-O. Jung, D. Ko, Y. Lee, S. Lim "18/110,439, Computation Apparatus in Memory Capable of Computation of Signed Weight”, Feb. 16, 2023. |
| 5 |
[Feb. 14, 2023]
S.-O. Jung, K. Cho, J. Oh, M. Yeo "18/168,943, SRAM with Improved Write Performance and Write Operation Method Thereof”, Feb. 14, 2023. |
| 6 |
[Feb. 4, 2023]
S.-O. Jung, T. Kim, J. You "18/105,815, Transmitter Circuit and Receiver Circuit of Interface Circuit and Operating Method Thereof”, Feb. 4, 2023.
[Jan. 4, 2023]
S.-O. Jung, T. Kim, J. You "202310008620.9(China), Transmitter Circuit and Receiver Circuit of Interface Circuit and Operating Method Thereof”, Jan. 4, 2023.
|
| 7 |
[Dec. 29, 2022]
S.-O. Jung, , G. S. kim, W. J. Jo, S. H. Park, J. Y. Kim "18/148,357, Error handling device, semiconductor memory device including the same, and error habdling method”, Dec. 29, 2022. |
| 8 |
[Sep. 17, 2022]
S.-O. Jung, , S. Lim "17/933,093, Content addressable memory based on self-rectifying ferroelectric tunnel junction element”, Sep. 17, 2022. |
| 9 |
[May. 26, 2022]
S.-O. Jung, , S. K. Kim, T. W. Oh, S. Lim, and D. Ko "17/804,272, Ferroelectric fet nonvolatile sense-amplifier-based flip-flop”, May. 26, 2022. |
| 10 |
[Feb. 14, 2022]
S.-O. Jung, S. Lim, T. W. Oh, S. K. Kim, and D. Ko "17/671,516, Physically Unclonable Function Apparatus Based on Ferroelectric Elements and Operation Method Thereof”, Feb. 14, 2022. |
| 11 |
[Jan. 28, 2022]
S.-O. Jung, S. K. Kim, T. W. Oh, S. Lim, and D. Ko "17/588,180, Nonvolatile Memory Device and Latch Including The Same”, Jan. 28, 2022. |
| 12 |
[Jan. 04, 2022]
S.-O. Jung, D. Ko, T. W. Oh, S. Lim, and S. K. Kim "17/568,065,Ferroelectric Random Access Memory Device and Method for Operating Read and Write Thereof”, Jan. 04, 2022. |
| 13 |
[Oct. 28, 2021]
S.-O. Jung, K. Cho "202111063367.4 (China), Integrated Circuit Including Cell Array With Word Line Assist Cells”, Oct. 28, 2021.
[Oct. 27, 2021]
S.-O. Jung, K. Cho "202111145879.5 (China), Integrated Circuit Memory Devices and Static Random Access Memory Devices”, Oct. 27, 2021. |
| 14 |
[Sep. 18, 2021]
S.-O. Jung, K. Cho "202111098713.2 (China), Integrated Circuit Including Cell Array With Write Assist Cell”, Sep. 18, 2021. |
| 15 |
[Sep. 17, 2021]
S.-O. Jung,T.-H. Kim "17/478,629,Memory Device Using a Plurality of Supply Voltages and Operating Method Thereof”, Sep. 17, 2021. |
| 16 |
[Aug. 12, 2021]
S.-O. Jung, J. Y. Kim, J. Lee "202110925177.2 (China), Transmitter and Receiver for Low Power Input/Output and Memory System Including The Same”, Aug. 12, 2021.
[Jun. 22, 2021]
S.-O. Jung, J. Y. Kim, J. Lee, "17/353,917, Transmitter and Receiver for Low Power Input/Output and Memory System Including The Same”, Jun. 22, 2021. |
| 17 |
[Jun. 03, 2021]
S.-O. Jung, T.-H. Kim, B. Song, "17/338,333, Memory device for canceling sneak current”, Jun. 03, 2021. |
| 18 |
[Jun. 01, 2021]
S.-O. Jung, K. Cho, "17/335,606, Integrated Circuit Including Cell Array With Word Line Assist Cell”, Jun. 01, 2021. |
| 19 |
[Jun. 01, 2021]
S.-O. Jung, K. Cho, "17/335,509, Integrated Circuit Including Cell Array With Write Assist Cell”, Jun. 01, 2021. |
| 20 |
[May. 27, 2021]
S.-O. Jung, K. Cho, "17/332,004, Static random access memory (SRAM) device and method of operating the same”, May. 27, 2021. |
| 21 |
[Sep. 23, 2020]
S.-O. Jung, S. Joo, S. M. Lee, "17/029,478, Image upscaling apparatus using artificial neural network having multiple deconvolution layers and deconvolution layer pluralization method thereof”, Sep. 23, 2020. |
| 22 |
[Aug. 19, 2020]
S.-O. Jung, H. K. Ahn, Y. K. Lee, "16/997,674, In-memory device for operating multi-bit weight”, Aug. 19, 2020. |
| 23 |
[Aug. 12, 2020]
S.-O. Jung, S. M. Lee, S. Joo, "16/992,066, Method for optimizing hardware structure of convolutional neural networks”, Aug. 12, 2020. |
| 24 |
[Jul. 31, 2018]
S.-O. Jung, K. Kim, D.-H. Jung, H. K. Ahn, "16/050,639, Apparatus for harvesting energy using dual environment energy source and method thereof”, Jul. 31, 2018. |
| 25 |
[Jul. 18, 2018]
S.-O. Jung, S.-H. Oh, H. Jeong, J. Park "16/038,414, Static Random Access Memory Including Assist Circuit”, Jul. 18, 2018.
[Jul. 18, 2018]
S.-O. Jung, S.-H. Oh, H. Jeong, J. Park "201810806052.6 (China), Static Random Access Memory Including Assist Circuit”, Jul. 18, 2018. |
| 26 |
[Apr. 5, 2017]
S.-O. Jung, J. Ko, J. Kim, "201710218129.3 (China), Non-volatile memory device and programming thereof”, Apr. 5, 2017. |
| 27 |
[Sep. 27, 2014]
S.-O. Jung, Y. Yang, S. S. Song, Z. Wang, C. F. Yeap, "14/499,147, Selective current boosting In a static random-access memory”, Sep. 27, 2014. |
| 28 |
[Sep. 27, 2014]
S.-O. Jung, T. Na, J. Kim, J. P. Kim, S. H. Kang, "14/499,156, Reference voltage generation for sensing resistive memory”, Sep. 27, 2014. |
| 29 |
[Sep. 27, 2014]
S.-O. Jung, T. Na, J. Kim, J. P. Kim, S. H. Kang, "14/499,158, Dual stage sensing current with reduced pulse width for reading resistive memory”, Sep. 27, 2014. |
| 30 |
[Dec. 28, 2012]
S.-O. Jung, H. Jeong, Y. H. YANG, J. Lee, J. Kim, “PCT/KR2012/011698, Apparatus and method for estimating an yield of a static random access memory”, Dec. 28, 2012. |
| 31 |
[Mar. 23, 2011]
S.-O. Jung, K. Ryu, D.-H. Jung, “PCT/KR2011/002001, Edge combiner, frequency multiplier and method of frequency multiplying using the edge combiner,” Mar. 23, 2011. |
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