Research goal
- Circuit Solutions for Challenge in GAA nanosheet based SRAM
- High-Reliability SRAM for Automotive
Description
- Low-power high-performance SRAM is necessary for long battery lifetime of the mobile devices and fast processing of the computational load in recent machine learning advances. However, yield and performance of SRAM are degraded by supply voltage scaling and new design issues due to technology scaling.
Research goal
- Improving the energy efficiency of the through-silicon via (TSV) I/O for high-banwidth memory (HBM)
- Ensuring signal integrity under the process, supply voltage, and temperature (PVT) variations
Description
- The development of new IT technologies such as AI, big data, and 5G has led to increased demand for high-performance and highly integrated memory semiconductors. Accordingly, high-bandwidth memory (HBM) technology is being developed by stacking DRAMs with through-silicon via (TSV). However, due to the heavy capacitive load of TSVs and the high bandwidth when using multiple I/Os, the power consumption in the HBM I/O interface occupies a large portion of the total dynamic power. Therefore, a low-power TSV signaling scheme for HBM I/O is demanded.
Research goal
- Development of heterogeneous system architecture (HSA) simulation environment
- Development of memory hierarchy optimized for HSA using HBM, DDR, and SCM
Description
- Analysis of DDR/HBM/SCM for HSA and circuit development to improve latency of HSA
- Extract the improved DDR/HBM/SCM latency parameter and transfer these parameter to the HSA simulation model