155 [Paper Accepted] IEEE TVLSI  admin 2018-01-15 2486
The following paper has been accepted for publication as a regular paper in the IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Author : Dong-Hoon Jung, Kyungho Ryu, Jung-Hyun Park, and Seong-Ook Jung
Title : All-Digital Process-Variation-Calibrated Timing Generator for ATE with 1.95-ps Resolution and Maximum 1.2-GHz Test Rate
Publiciation : IEEE Transactions on Very Large Scale Integration (VLSI) Systems

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